Emissions Resulting from the Deposition and Etching of the Low k Dielectrics

Worth, Walter ; English, Lee Ann
(International SEMATECH, Austin, TX)

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The semiconductor industry is introducing a host of new materials and processes to meet the low-k and high-k targets set by the International Technology Roadmap for Semiconductors. Up to now the bulk of the semiconductors have used silicon dioxide as the dielectric material, which has dielectric constant (k) of 3.9-4.0. However, for the 100 nm technology node, which will move into full-scale manufacturing in the 2004–2005 timeframe, the industry is currently evaluating materials with k=2 or less. These materials will most likely be porous, organic, or partially organic, materials. Even the methodology for applying these materials will probably be different from the plasma enhanced chemical vapor deposition (PECVD) currently used for applying silicon dioxide to the silicon wafer. This paper presents the results of a characterization of the emissions during the spin-on deposition process, subsequent annealing of the films and finally the etching of the films. The paper will discuss the ESH impacts and potential emission controls and treatment.

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